This application relates to circuitry for integrated circuits such as programmable logic array integrated circuits (“programmable logic devices”), and more particularly, to programmable output driver circuitry with the capability to provide adjustable amounts of preemphasis.
Programmable logic devices are integrated circuits that may be programmed by a user to perform various logic functions. Programmable logic devices may have differential (two-pin) input-output (“I/O”) circuitry for handling high-speed (I/O) signals. Some currently-available programmable logic devices with differential input-output circuitry use output drivers with a fixed (non-programmable) preemphasis feature and have input-output driver circuitry that may be selectively configured to accommodate different communications standards. The preemphasis capabilities that are provided by these output drivers help to drive high-speed signals over communications paths that are used to convey data between various system components. A user of this type of device may configure the programmable circuitry so that the peak-to-peak voltage and average voltage of the input-output signals match those specified for a particular desired signaling standard. These devices may therefore be configured to handle different high-speed differential signaling standards.
Another type of currently-available programmable logic device has programmable preemphasis circuitry that applies preemphasis signals of different durations to its high-speed output signals depending on which high-speed differential signaling standard is selected by the user. The current supply circuitry in the preemphasis circuitry in this type of device is not programmable and therefore does not provide programmable slope steepening effects at the leading and trailing edges of the I/O signals.
It is an object of the present invention to provide integrated circuit devices such as programmable logic devices that have input-output circuitry with enhanced programmable output driver preemphasis capabilities.